As memories become more and more dense, not only are there more memory cells, there are also more sense amplifiers, decoders, address buffers and other circuitry necessary for the operation of the memory. Consequently for a given probability of a failure of a single circuit type, the more of the circuit type that is present, the more likely the memory device will contain a failure, making the whole device defective. One approach is to use redundancy techniques. This of course requires additional chip area as well as requiring repair time and repair equipment which can be very expensive. Another approach is to reduce the probability of one of the circuit elements being a failure.
In the case of sense amplifiers, the failure mode of most concern is offset of the differential amplifier. Of course other defects can cause sense amplifier failure as well, but these other defects will likely be evident at other locations on the memory chip, causing other failures. Offset of the differential amplifier can be from causes which do not result in failures anywhere else on the chip. Consequently, it is particularly desirable to avoid sense amplifier failure due to offset. A typical differential amplifier is a cross-coupled pair of transistors. The offset in such a case is from two major causes which can appear together or independently. One major cause is threshold voltage differential between the two transistors. The other major cause is gain differential between the two transistors. The cause of gain differential is typically effective gate length differential. Although gains and threshold voltages vary substantially from one chip to another due to processing variations, gains and threshold voltages are matched quite closely on a given chip. Nonetheless, there is some variation even on the same chip. As the number of sense amplifiers increase as the density increases, the probability of there being enough gain and/or threshold voltage variation to cause an offset failure on at least one sense amplifier increases.
One technique to reduce failures due to offset is to enable the cross-coupled amplifier relatively slowly. This is to avoid having large current flow. Large current flow amplifies the offset problem for the case of threshold voltage differential. Another variation of this approach is to enable the cross-coupled pair with a weak transistor which provides significant current limiting, then subsequently enabling the cross-coupled pair with a much higher gain transistor. These approaches are useful but do not provide much help for the gain differential situation.
In a cross-coupled pair sense amplifier, the amplifier feeds back to the bit lines. This is typically necessary to restore data in the selected storage cell. The sense amplifier is expected to be able to detect a voltage differential of 75 millivolts on the bit lines. For the case in which the amplifier has minimal offset, the amplifier senses the voltage differential on the bit lines and begins to further increase the voltage differential. In the case where there is significant offset, the amplifier may actually begin pulling the bit lines closer together in voltage. Once this begins the amplifier will eventually cause the voltage on the bit lines to cross-over and reverse the data. This failure mode is the kind that can occur to a single sense amplifier on the chip while there are no other failures on the chip.